Scalable TTL_PAPERS

The TTL_PAPERS (TTL implementation of Purdue's Adapter for Parallel Execution and Rapid Synchronization) being released at Supercomputing '95 is an eight-machine version of the four-machine TTL_PAPERS introduced at last year's conference. In addition, the new TTL_PAPERS 951201 board design permits multiple boards to be interconnected in a tree structure to support massive numbers of machines.

The practical maximum number of machines that can be placed in a single rack is eight; thus, larger systems are composed of multiple eight-machine racks, each containing a TTL_PAPERS 951201 board. In a large system, one rack's board is configured as the root. This board is then connected to "child" boards in up to four other racks; each of these can be configured either as a leaf or as an internal node with up to four "child" racks. Each level in this tree adds less than a microsecond to the latency of the system; thus, a TTL_PAPERS 951201 cluster with as many as 2,728 machines would use just five levels and have a basic barrier latency under ten microseconds.

These four different configurations of the TTL_PAPERS 951201 board require different chip population, but the board is arranged to eliminate the need for jumpers. Another convenience feature is that the second side is used to label component and signal positions. There is also a new interface on the board that facilitates connection of external logic to support real-time control applications (e.g., for each board, an external timer or sensor can trigger a barrier).

The reverse side of this sheet gives the layouts for both sides of the TTL_PAPERS 951201 board. Full information will be available from http://garage.ecn.purdue.edu/~papers

Alternatively, contact Prof. Hank Dietz, School of Electrical and Computer Engineering, Purdue University, West Lafayette, IN, 47907-1285, phone: (317) 494 3357, fax: (317) 494 3371, email: [email protected]